Semiconductor chip module and method for manufacturing the same
US6262483A · kind A · utility
Inventor
Key dates
| Filing date | Jun 10, 1999 |
| Grant date | Jul 17, 2001 |
| Priority date | — |
| Expiry date | Jun 10, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip module includes first and second semiconductor chips, and a dielectric tape layer. The first semiconductor chip has a pad mounting surface with a plurality of first bonding pads provided thereon. The dielectric tape layer has opposite first and second adhesive surfaces. The first adhesive surface is adhered onto the pad mounting surface of the first semiconductor chip. The dielectric tape layer is formed with a plurality of holes at positions registered with the first bonding pads to expose the first bonding pads. Each of the holes is confined by a wall that cooperates with a registered one of the first bonding pads to form a contact receiving space. A plurality of conductive contacts are placed in the contact receiving spaces, respectively. The second semiconductor chip has a chip mounting surface adhered onto the second adhesive surface of the dielectric tape layer. The chip mounting surface is provided with second bonding pads that are bonded to the conductive contacts to establish electrical connection with the first bonding pads. A method for manufacturing the semiconductor chip module is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.