Field programmable processor devices
US6262908A · kind A · utility
57Cited by
10References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 13, 1999 |
| Grant date | Jul 17, 2001 |
| Priority date | — |
| Expiry date | Jul 13, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17796
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A field programmable device comprising an array of processing devices, a connection matrix interconnecting the processing devices and including switches, and memory cells for storing data for controlling the switches to define the configuration of the interconnections of the connection matrix. In order to provide flexible use of memory and to enable higher memory densities, gates are provided which can be used to isolate the effect of the data stored in groups of the memory cells and switches on the configuration of the interconnections so that the memory cells in that group are available for storing other data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.