Variable rate MPEG-2 video syntax processor
US6263019A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 9, 1998 |
| Grant date | Jul 17, 2001 |
| Priority date | — |
| Expiry date | Oct 9, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/70
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An MPEG-2 video signal decoder includes a syntax parser which is implemented as a state machine. The state machine defines a plurality of states in which discrete parsing operations are performed to decode the MPEG-2 bit-stream. A distinct processing time is established for each state in the state machine. Even if the processing for a particular state is complete before the end of the respective processing time for the state, the transition from the state to the next state does not occur until the end of the time interval. The processing time for each state is set by a microprocessor coupled to the state machine. The processing time for each state may be changed based on image content or to accommodate changes in the circuitry used to implement the state machine. The processing times for the states may also be adjusted to accommodate changes in other processing elements, separate from the state machine but which depend on the state machine for the processing that they perform. One way in which the processing times may be changed is to conform the processing of an image or a sequence of images to a predetermined maximum time interval.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.