Efficient look-up table methods for Reed-Solomon decoding
US6263470A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 25, 1998 |
| Grant date | Jul 17, 2001 |
| Priority date | — |
| Expiry date | Nov 25, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/1515
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A programmable logic device (130) as may be used in a communication system device such as a digital subscriber line modem (408) to perform Reed-Solomon decoding upon a received frame of digital values is disclosed. The programmable logic device (130) may be implemented as a DSP (130) or a general purpose microprocessor, for example. According to one disclosed embodiment of the invention, a group of look-up tables (60) are arranged, each look-up table (60) associated with one of the possible power values of a finite field, number up to twice the number of correctable errors. The contents of each entry (SYN) of the look-up tables (60) correspond to the finite field (e.g., Galois field) multiplication of a primitive element raised to an index power with a character of the finite field alphabet. Galois field multiplications (62) in syndrome accumulation may now be performed with a single table look-up operation. According to other disclosed embodiments of the invention, look-up tables (60, 160) are similarly arranged to contain the contents of finite field (e.g., Galois field) multiplication products for use in a Chien search procedure. In a single-thread version of the disclosed Chien…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.