Method for detecting and characterizing plasma-etch induced damage in an integrated circuit
US6265729A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 1999 |
| Grant date | Jul 24, 2001 |
| Priority date | — |
| Expiry date | Mar 26, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/12
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Characterization of plasma-induced damage in semiconductor manufacturing has long been considered unimportant because the damage had no discernible effect on circuit performance. With increasing transistor counts on an integrated circuit, the damage-induced parasitics are becoming increasingly important. Electrical characterization of such effects provides a far more sensitive method for determining the extent of damage and the effectiveness of efforts to repair the damage. A measurement of diode leakage current through a plasma-etch effect test diode which is formed completely within an active device region, removed from field oxide regions quantifies the extent of damage created by a plasma and the effectiveness of a repair technique that may be applied to the process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.