System and method for permitting out-of-order execution of load instructions
US6266768A · kind A · utility
44Cited by
3References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 16, 1998 |
| Grant date | Jul 24, 2001 |
| Priority date | — |
| Expiry date | Dec 16, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3834
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a load/store unit within a microprocessor, load instructions are executed out of order. The load instructions are assigned tags in a predetermined manner, and then assigned to a load reorder queue for keeping track of the program order of the load instructions. Then when new load instructions are issued, the new load instructions are compared to entries within the load reorder queues to detect out of order problems.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.