Electrical mask identification of memory modules
US6268228A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 27, 1999 |
| Grant date | Jul 31, 2001 |
| Priority date | — |
| Expiry date | Jan 27, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70541
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
Mask programmable conductors of the same construction as the mask layers they define are utilized for mask vintage identification. When the actual mask layer is altered, the change is recorded within the mask itself. Mask identification can be fabricated to identify the following type of mask layers: DT--deep trench; SS--surface strap; DIFF--Diffusion; NDIFF--N Diffusion; PDIFF--P Diffusion; WL--N wells; PC--polysilicon gates; BN--N diffusion Implant; BP--P diffusion Implant; C1--first contact; M1--first metal layer; C2--second contact; and, M2--second metal layer. Conducting paths that incorporate, in series, the mask programmable conductor technology devices are: M1-C1-PC-C1-DIFF-C1-M1-C2-M2; M1-C1-PDIFF-SS-DT-SS-PDIFF-C1-M1-C2-M2; M2-C2-M1-C1-PC-C1-M1; M2-C2-M1-C1-NDIFF-WL-NDIFF-C1-M1; and, M2-C2-M1-C1-NDIFF-C1-M1-C1-PC-C1-M1. These conducting paths are electrically opened with the omission of any of the layers in the series path.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.