Depletion type MOS semiconductor device and MOS power IC
US6268628A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 5, 1999 |
| Grant date | Jul 31, 2001 |
| Priority date | — |
| Expiry date | Apr 5, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/403
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A depletion type MOS semiconductor device is provided which includes a p.sup.- well region formed in a surface layer of an n.sup.- drift layer, an n.sup.+ emitter region formed in a surface layer of the p.sup.- well region, an n.sup.- depletion region formed in the surface layer of the p well region, to extend from the n.sup.+ emitter region to a surface layer of the n drift layer, a gate electrode layer formed on a gate insulating film, over the n.sup.- depletion region, an emitter electrode formed in contact with surfaces of both of the n.sup.+ emitter region and the p.sup.- well region, and a collector electrode formed on a rear surface of the n.sup.- drift layer. Also provided is a MOS power IC in which the depletion type MOS semiconductor device is integrated with a vertical MOSFET or IGBT. The MOS power IC has a high breakdown voltage, and includes a circuit for feeding back an increase in the potential of the C terminal to the gate (g.sub.m) of the MOSFET or IGBT. Other examples of MOS power IC may include circuits suitable for high-speed turn-on or turn-off operations, and circuits for supplying power to an internal control circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.