Operation and biasing for single device equivalent to CMOS
US6268636A · kind A · utility
Inventor
Key dates
| Filing date | Feb 8, 1999 |
| Grant date | Jul 31, 2001 |
| Priority date | — |
| Expiry date | Feb 8, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/86
Abstract
Disclosed are semiconductor devices including at least one junction which is rectifying whether the semiconductor is caused to be N or P-type, by the presence of field induced carriers. In particular, inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to conventional multiple device CMOS systems, which can be operated as modulators, are disclosed as are a non-latching SCR and an approach to blocking parasitic currents. Operation of the gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems under typical bias schemes is described, and simple demonstrative five mask fabrication procedures for the inverting and non-inverting gate voltage channel induced semiconductor single devices with operating characteristics similar to multiple device CMOS systems are also presented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.