Slew rate controlled power amplifier
US6268772A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 15, 1999 |
| Grant date | Jul 31, 2001 |
| Priority date | — |
| Expiry date | Nov 15, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/345
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A slew rate controlled power amplifier (112) for use in a dc motor driver circuit is presented. The amplifier (112) has a power transistor (72) connected to control a drive current (I.sub.MOTOR) in a phase of the dc motor with which it is associated and to develop an output voltage (V.sub.OUT) on the phase in accordance with the drive current (I.sub.MOTOR). A mirror transistor (74) is connected to establish the ratioed magnitude of the current in the power transistor (72), and a feedback circuit (90) is connected to controllably feed back the output voltage (V.sub.OUT) to the mirror transistor (74) to control the drive current (I.sub.MOTOR). A commutatively operated slew-rate control circuit (57,58) is connected to the feedback circuit (90) to control the drive current (I.sub.MOTOR). By coupling the feedback from the phase voltage, V.sub.OUT, into the current loop the loop stability is greatly improved and oscillations on the output phase voltage are reduced or eliminated. The circuit may also have a voltage-equalizing transistor (78) in series with the mirror transistor (74) and a differential amplifier (85) to develop a bias voltage to the voltage-equalizing transistor (78) based…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.