Serial line synchronization method and apparatus
US6269127A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 19, 1997 |
| Grant date | Jul 31, 2001 |
| Priority date | — |
| Expiry date | Mar 19, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/4904
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Apparatus, and an accompanying method, for transmitting a frame synchronization signal and a data signal simultaneously through a serial transmission medium (170). Specifically within a data transmitter (105), a frame synchronization signal, a clock signal and a data signal, are encoded to form a single bi-phase mark signal that is defined by a specific modulation protocol and the frame synchronization signal is incorporated into the bi-phase mark signal as a protocal violation. The bi-phase mark signal is then transmitted through a suitable serial transmission medium. A receiver (175), connected to the transmission medium, receives and amplifies an incoming bi-phase mark signal appearing on the medium, and, in turn, synthesizes the clock, frame synchronization, and data signals from this bi-phase mark signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.