Low-voltage, very-low-power conductance mode neuron
US6269352A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 14, 1999 |
| Grant date | Jul 31, 2001 |
| Priority date | — |
| Expiry date | Dec 14, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/065
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A neural network including a number of synaptic weighting elements, and a neuron stage; each of the synaptic weighting elements having a respective synaptic input connection supplied with a respective input signal; and the neuron stage having inputs connected to the synaptic weighting elements, and being connected to an output of the neural network supplying a digital output signal. The accumulated weighted inputs are represented as conductances, and a conductance-mode neuron is used to apply nonlinearity and produce an output. The synaptic weighting elements are formed by memory cells programmable to different threshold voltage levels, so that each presents a respective programmable conductance; and the neuron stage provides for measuring conductance on the basis of the current through the memory cells, and for generating a binary output signal on the basis of the total conductance of the synaptic elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.