Method of making an article comprising an oxide layer on a GaAs-based semiconductor body
US6271069A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 1998 |
| Grant date | Aug 7, 2001 |
| Priority date | — |
| Expiry date | Jul 24, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/85
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed are a method of making GaAs-based enhancement-type MOS-FETs, and articles (e.g., GaAs-based ICs) that comprise such a MOS-FET. The MOS-FETs are planar devices, without etched recess or epitaxial re-growth, with gate oxide that is primarily Ga.sub.2 O.sub.3, and with low midgap interface state density (e.g., at most 1.times.10.sup.11 cm.sup.-2 eV.sup.-1 at 20.degree. C.). The method involves ion implantation, implant activation in an As-containing atmosphere, surface reconstruction, and in situ deposition of the gate oxide. In preferred embodiments, no processing step subsequent to gate oxide formation is carried out above 300.degree. C. in air, or above about 700.degree. C. in UHV. The method makes possible fabrication of planar enhancement-type MOS-FETs having excellent characteristics, and also makes possible fabrication of complementary MOS-FETs, as well as ICs comprising MOS-FETs and MES-FETs. The method includes deposition of gate oxide of overall composition Ga.sub.x A.sub.y O.sub.z, where Ga substantially is in the 3+ oxidation state, A is one or more electropositive stabilizer element adapted for stabilizing Ga in the 3+ oxidation state, x is greater than or equal…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.