Integrated circuit chip and method for fabricating the same
US6271586A · kind A · utility
Inventor
Key dates
| Filing date | Apr 30, 1999 |
| Grant date | Aug 7, 2001 |
| Priority date | — |
| Expiry date | Apr 30, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating an integrated circuit chip includes the steps of: PA1 (a) forming a circuit board unit with a die-receiving cavity, and a plurality of contact pads on a top surface of the circuit board unit; PA1 (b) forming a die having an upper surface provided with a plurality of solder pads; PA1 (c) placing the die in the die-receiving cavity such that the solder pads on the die are exposed; PA1 (d) wire-bonding the solder pads to the contact pads via conductive wires; PA1 (e) placing a lead frame on the circuit board unit, and connecting leads on the lead frame to corresponding ones of the contact pads via a conductive contact layer; and PA1 (f) forming a plastic protective layer to encapsulate the circuit board unit and at least a portion of the lead frame.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.