Capacitor-based digital-to-analog converter with continuous time output
US6271784A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 12, 1997 |
| Grant date | Aug 7, 2001 |
| Priority date | — |
| Expiry date | Aug 12, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/804
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A digital-to-analog converter (DAC) including an array of switched input capacitors which store samples of charge proportional to a digital input signal, and an analog output circuit which integrates the samples of charge to generate an output analog signal that is proportional to said digital input signal. The capacitors store a binary representation of the digital input signal. The output circuit includes a zeroth order sample-and-hold circuit having first and second stages with respective first and second operational amplifiers. The first and second stages are cascaded together during a sample phase so that the analog output signal is stored in a capacitor in a feedback path between the output of the second stage and the input of the first stage, and are disconnected from one another during a hold phase so that the first stage is auto-zeroed and the second stage holds the analog output signal as a continuous time output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.