Processing method and apparatus involving a processor instruction using hashing
US6272614A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 1999 |
| Grant date | Aug 7, 2001 |
| Priority date | — |
| Expiry date | Apr 30, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/383
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A program-controlling processing unit executes instructions stored in memory. A special instruction type is provided for selectively retrieving an element from memory in dependence on the value of input data subject of the instruction. Each instruction of this type has a header identifying the instruction type, and a body in the form of a hash table having at least one entry with both (i) a check value corresponding to a value of interest of the input data subject of the instruction, and (ii) an element to be used when the input data has said value of interest. Upon execution of such an instruction, the related input data is hashed to produce an offset value that is used to access in memory, relative to the position in memory of the current instruction, a corresponding entry in the hash table of the instruction. If a "hit" results (that is, the check value of the accessed entry matches the input data value), the entry element is operatively output. Such a compact, relocatable, instruction is of particular use in processing units for controlling packet switches where the packet destination address is used to determine routing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.