Method of pocket implant modeling for a CMOS process
US6274449A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 1998 |
| Grant date | Aug 14, 2001 |
| Priority date | — |
| Expiry date | Dec 18, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0167
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention comprises a method of determining the thermal straggle of microelectronic devices having a pocket dopant implant that is formed under substantially the same doping conditions. The method comprises measuring the operating characteristics of each device (32) and obtaining a one-dimensional doping profile of dopant ions in the devices (30). A total lateral straggle of the dopant ions in the devices is determined in response to the operating characteristics and the one-dimensional doping profile of the dopant ions (34). An as-implanted straggle of the dopant ions in the devices is determined in response to the doping conditions (36). A thermal straggle of the dopant ions is calculated utilizing the as-implanted straggle and the total lateral straggle (38).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.