Patent · US Expired

Method and system for immediate exponent normalization in a fast floating point adder

US6275839A · kind A · utility

1Cited by

7References

8Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Gunter Gerwig · Simmozheim, DE
Klaus J. Getzlaff · Schenefeld, DE
Michael Kroner · Oerlinghausen, DE

Key dates

Filing date	Oct 15, 1998
Grant date	Aug 14, 2001
Priority date	—
Expiry date	Oct 15, 2018

Classification

Technology area (CPC G)Physics
CPC primaryG06F7/49936
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A method and system for use in a data processing system is proposed, wherein the Input Exponent is used already in the subblocks of the mantissa addition. Early in the flow of a cycle, there are parts of the Potential exponent result generated and put together using zero detect signals and carry select signals of the Carry Select Adder of the mantissa addition. For the addition of two floating point numbers this reduces the number of required logic gates in the timing critical path. This allows a faster cycle time and/or less latency and/or more complex functions. The method and system according to the invention can be applied to adders of different mantissa widths or different exponent widths as well as power of radix 2.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.