Method and apparatus for efficient error detection and correction in long byte strings using generalized, integrated, interleaved reed-solomon codewords
US6275965A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 1, 1999 |
| Grant date | Aug 14, 2001 |
| Priority date | — |
| Expiry date | Mar 1, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/2903
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and means for enhancing the error detection and correction capability obtained when a plurality of data byte strings are encoded in a two-level, block-formatted linear code using code word and block-level redundancy. This is accomplished by vector multiplication of N data byte vectors and a nonsingular invertible integration matrix with nonzero minors with order up to B to secure the necessary interleaving among N data byte vectors to form modified data byte vectors. The selected patterns of interleaving ensure single-pass, two-level linear block error correction coding when the modified data vectors are applied to an ECC encoding arrangement. The method and means are parameterized so as to either extend or reduce the number of bursty codewords or subblocks to which the block-level check bytes can be applied. Lastly, a post-encoding process is provided to "deinterleave" or redistribute the computed codewords into modified codewords such that the data vectors and their codeword check bytes are consistently located in the same codeword with the block-level check bytes are distributed among the first-level codewords.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.