Integrated circuit design with delayed cell selection
US6275973A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 30, 1998 |
| Grant date | Aug 14, 2001 |
| Priority date | — |
| Expiry date | Oct 30, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Integrated circuit chip design in which a technology-independent description of an integrated circuit design is obtained. A first component is selected from a pre-defined first library based on the technology-independent description, and an interconnection is specified between the first component and a second component based on the technology-independent description. The first component and the second component are laid out on a surface of the integrated circuit chip so as to obtain an initial layout, and a routing characteristic for the interconnection is estimated based on the initial layout. The first component is then replaced with a new component selected from a pre-defined second library based on the routing characteristic. According to this aspect of the invention, the pre-defined first library is smaller than the pre-defined second library.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.