Clustered, buffered simms and assemblies thereof
US6276844A · kind A · utility
36Cited by
6References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 30, 1996 |
| Grant date | Aug 21, 2001 |
| Priority date | — |
| Expiry date | Oct 30, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system including an improved method and apparatus for the arrangement and interconnection between electronic devices to improve system cycle time. The apparatus possesses a) a plurality of: memory SIMMs, memory devices on the noted memory SIMMs and registers; b) a clock; c) means for connecting signals between the memory devices on the memory SIMMs and the registers; and d) means for connecting signals between the memory devices on the memory SIMMs and the clocks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.