Method of manufacturing semiconductor device having a recessed gate structure
US6277707A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 1998 |
| Grant date | Aug 21, 2001 |
| Priority date | — |
| Expiry date | Dec 16, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/027
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a semiconductor device on a substrate including the steps of: forming a first recess in the substrate; depositing an insulator in the first recess so that an isolation region is formed when the first recess is filled with the insulator; forming a second recess in a predetermined area of the substrate; forming a recess insulation layer on the surface of the second recess; depositing a conductive material on the recess insulation layer and in the second recess so that a gate region is formed when the second recess is filled with the conductive material; removing a sufficient amount of the insulator and the conductive material so that the top surfaces of the insulator, the conductive material and the substrate are substantially at the same level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.