Hot carrier effect simulation for integrated circuits
US6278964A · kind A · utility
28Cited by
6References
46Claims
0Family size
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Key dates
| Filing date | May 29, 1998 |
| Grant date | Aug 21, 2001 |
| Priority date | — |
| Expiry date | May 29, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An approach for simulating hot carrier effects in an integrated circuit (IC) at the circuit level includes generating a hot carrier library of delay data for each cell in the IC, using the hot carrier library data to generate a set of scaled timing data for the IC and using the scaled timing data with a IC performance simulator to simulate the IC operation. The scaled timing data is based upon the cell delay data and time-based switching activity of each cell in the IC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.