Method and device for providing an instruction trace from an on-chip CPU using control signals from the CPU
US6279103A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 19, 1997 |
| Grant date | Aug 21, 2001 |
| Priority date | — |
| Expiry date | Dec 19, 2017 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/3648
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is disclosed a single chip integrated circuit device comprising an instruction trace controller operable to monitor an address in memory of instructions to be executed by an on-chip CPU. The instruction trace controller is connected to trace storage locations for causing selected ones of said addresses to be stored at said trace locations, dependent upon detection that one of said addresses is not the next sequential address in memory after the previous one of the addresses. There is also disclosed a method of providing an instruction trace from an on-chip CPU within a single chip integrated circuit device in which addresses in memory of instructions to be executed by the CPU are held sequentially in an instruction pointer register. The addresses are monitored by an instruction trace controller, which is operable to cause selected ones of the address to be stored at a predetermined trace storage location dependent on detection that one of the addresses is not the next sequential address in memory after the previous one of the addresses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.