Tri-state bus amplifier-accelerator
US6281708A · kind A · utility
11Cited by
3References
28Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 15, 1999 |
| Grant date | Aug 28, 2001 |
| Priority date | — |
| Expiry date | Jun 15, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/01721
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present invention provides a centralized amplifier-accelerator a tri-state bus. The centralized amplifier-accelerator utilizes the module drivers as pre-drivers to the amplifier-accelerator. The centralized amplifier-accelerator is located physically in the center of the chip. This central amplifier-accelerator consists of a highly sensitive input sense circuit which detects voltage transition at very near the N-channel threshold for rising transitions and at very near the P-channel threshold for falling transitions. Once the sense circuit threshold is met, the output driver is triggered to drive the bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.