Device and method for power-on/power-off checking of an integrated circuit
US6281723A · kind A · utility
15Cited by
15References
27Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 18, 1997 |
| Grant date | Aug 28, 2001 |
| Priority date | — |
| Expiry date | Dec 18, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1735
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A checking device to control the power-on or power-off operations in an integrated circuit comprises a voltage reference circuit biased by a bias circuit, and an output stage. The device further comprises a control circuit to activate or deactivate the bias circuit as a function of the prevailing mode of operation of the integrated circuit, and a capacitor. A dynamic detection circuit is also associated with a transistor for discharging the capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.