Circuits and methods for testing logic devices by modulating a test voltage with a noise signal
US6286117A · kind A · utility
14Cited by
9References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 22, 1998 |
| Grant date | Sep 4, 2001 |
| Priority date | — |
| Expiry date | Jun 22, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/30
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Noise is introduced into test inputs and voltage supplies provided to logic devices while under going testing by modulating a test voltage output with a noise signal to produce the test input. In particular, a noise signal and a test voltage output are generated. The test voltage output is modulated with the noise signal to provide a test input to the logic device. A more accurate approximation of an actual operating environment is thereby provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.