Method to increase frequency of digital circuits
US6288579A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 7, 1999 |
| Grant date | Sep 11, 2001 |
| Priority date | — |
| Expiry date | Dec 7, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01P5/02
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A method to design and fabricate circuits is disclosed which will permit such circuits to operate at higher frequencies. The method is particularly adapted to integrated digital circuits, and to differential sections of such circuits, but may be applied more broadly. A load on the output of an amplifying section of the circuit is designed employing a section of high impedance inductive transmission line nearest the output node, which is then connected to a section of low impedance capacitive transmission line, and then is terminated into a resistor which provides the 0 Hz load for the circuit. By reducing the effect of the resistor portion of the load, the capacitive transmission line section permits the entire load, as seen at the output of the amplifying section, to appear more ideally inductive than has previously been achieved. Due to this inductive appearance, response times are improved and the circuit is able to operate at significantly higher frequencies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.