Semiconductor device
US6291835A · kind A · utility
8Cited by
6References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 23, 2000 |
| Grant date | Sep 18, 2001 |
| Priority date | — |
| Expiry date | May 23, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/34
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Bonding pads (3) are arranged on the outer side of an in-chip circuit region (2) of a semiconductor integrated circuit board (1), and a scribed line (4) for chip separation is formed on the outer side thereof. A corner portion (4a) of the scribed line (4) is formed to be wider than a remaining portion (4b) thereof, and a wafer test circuit (5) and test pads (6) are formed in the corner portion (4a).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.