Multistack 3-dimensional high density semiconductor device and method for fabrication
US6291858A · kind A · utility
61Cited by
14References
9Claims
0Family size
Assignee
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Key dates
| Filing date | Jan 3, 2000 |
| Grant date | Sep 18, 2001 |
| Priority date | — |
| Expiry date | Jan 3, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76898
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A multistack 3-D semiconductor structure comprising a first level structure comprising a first semiconductor substrate and first active devices; and a second level structure comprising a SOI semiconductor structure bonded to the first level structure and further comprising second active devices; and wherein the first active devices are more heat tolerant than the second active devices is provided along with a method for its fabrication.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.