Data output buffer with precharge
US6292405A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 11, 2000 |
| Grant date | Sep 18, 2001 |
| Priority date | — |
| Expiry date | Aug 11, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/106
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data output buffer includes an output node, and a first stage connected to the output node for providing a first control signal for precharging the output node to an intermediate voltage with respect to a voltage for switching the output node from a current logic state to a different logic state. A second stage is connected to the first stage and to the output buffer. The first and second stages are responsive to a second control signal for enabling output of new data. A precharge logic circuit precharges the output node to the intermediate voltage as a function of data last output, and as a function of first and second reset signals until a rising and falling edge of the data last output respectively crosses the intermediate voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.