Shadow arrays for distributed memory multiprocessor architecture
US6292826A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 1998 |
| Grant date | Sep 18, 2001 |
| Priority date | — |
| Expiry date | Sep 28, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/5016
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Shadow arrays are configured in a distributed memory multiprocessor architecture to localize memory referencing. As each additional processor becomes active a variable array having dimensions 1.times.N, including N single instance variables which must be monitored on a "per processor" basis, is configured in a memory local to the additional processor and made locally referenceable. A patchwork of shadow arrays is thereby established in which each additional processor may reference local memory to access its own value set for the N single instance variables. The single instance formatting of the arrays also advantageously facilitates migration from an single processor operating system to a multiprocessor operating system without substantial recoding.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.