Semiconductor device
US6295243A · kind A · utility
6Cited by
12References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 29, 1999 |
| Grant date | Sep 25, 2001 |
| Priority date | — |
| Expiry date | Nov 29, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/48
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit includes a plurality of semiconductor memory devices implemented as DRAMs and an output selector on the same chip. External terminals of the chip include: terminals for inputting an inverted row address strobe signal /RAS to the respective semiconductor memory devices individually; and common terminals for inputting PRAUT, SLF, /CAS, ADR, /WE, /OE, CLK and TMODE signals to all the memory devices. The output signals TDQ, SRAS, MOUT and BITST of the semiconductor memory devices are controlled by the output selector, passed through a common test bus and then output from a common external terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.