Vertical bipolar semiconductor power transistor with an interdigitzed geometry, with optimization of the base-to-emitter potential difference

US6297118A · kind A · utility

Assignee

• STMicroelectronics SA

Inventor

• Davide Giuseppe Patti · Mascalucia, IT

Key dates

• Filing date: Apr 13, 2000
• Grant date: Oct 2, 2001
• Expiry date: Apr 13, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/125

Abstract

A transistor including an epitaxial layer with a first conductivity type, a base buried region with a second conductivity type, and a sinker base region with the second conductivity type which extends from a main surface of the transistor to the base buried region, and delimits, together with the base buried region, emitter fingers in the epitaxial layer. The transistor further includes an emitter buried region with the first conductivity type and a doping level which is higher than that of the epitaxial layer. The emitter buried region is embedded in the epitaxial layer in a position adjacent to the base buried region. A sinker emitter region having the first conductivity type and a doping level which is higher than that of the epitaxial layer and extends from the main surface to the emitter buried region inside the emitter fingers. The emitter buried region and the sinker emitter region delimit in each emitter finger pairs of sections which are mutually spaced and delimit between one another a central region of the epitaxial layer. The sinker emitter region of each pair of sections of an emitter finger extend in the vicinity of mutually facing edges of the emitter buried region o…