Semiconductor memory device having floating gate type transistors programmed to have differing threshold voltages
US6301154A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 3, 2000 |
| Grant date | Oct 9, 2001 |
| Priority date | — |
| Expiry date | Feb 3, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0441
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device of the present invention is designed so as to comprise (1) first and second transistors of a floating gate type, programmed so as to have different threshold voltages, (2) a latch circuit for producing binary data according to a difference between the threshold voltages, upon turning on of the first and second transistors, and retaining the binary data, and (3) a bias voltage switching circuit that selects either a first voltage or a voltage obtained by raising the first voltage in the case of actuation by the first voltage, depending on on/off of a set-up signal SETUP, whereas selects either a second voltage lower than the first voltage or a voltage obtained by raising the second voltage in the case of actuation by the second voltage in response to input of the set-up signal SETUP, depending on whether the second voltage has a normal value or a value exceeding the same, and outputs the selected voltage to the gates of the first and second transistors. This provides a semiconductor memory device that normally operates with a power source voltage in any one of a plurality of ranges and is capable of maintaining a stable operation when the power source v…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.