Sense amplifier circuit and semiconductor storage device
US6301180A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 13, 2000 |
| Grant date | Oct 9, 2001 |
| Priority date | — |
| Expiry date | Sep 13, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/065
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one embodiment, a latch-type sense amplifier can reduce noise at a signal input that may be generated by capacitive coupling of a sense amplifier latch enable signal. A latch-type sense amplifier may include a first transfer gate TG1 between a first input SA1 and a first latch node N1, and a second transfer gate TG2 between a second input SA2 and a second latch node N2. A first transfer gate may include complementary transistors NM1 and PM1. Transistor NM1 can receive a control signal /SE at a control gate while transistor PM1 can receive a complementary control signal SE at a control gate. Transistor NM1 may include a parasitic capacitance C0N and transistor PM1 may include a parasitic capacitance C0P that is essentially equivalent to C0N. In such an arrangement, noise at first input SA1 generated by capacitive coupling of a control signal SE can be reduced and/or cancelled by noise generated by capacitive coupling of a complementary control signal /SE.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.