Device for synchronizing a reference event of an analog signal on a clock
US6304113A · kind A · utility
4Cited by
4References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jul 28, 2000 |
| Grant date | Oct 16, 2001 |
| Priority date | — |
| Expiry date | Jul 28, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0337
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A device for synchronizing a reference event of an analog signal, which includes an analog-to-digital converter receiving an input signal, a register receiving the converter output, a phase-locked loop including an oscillator generating several phase-shifted clock signals of same period, a first clock signal clocking the register, a multiplexer receiving the other clock signals on respective inputs, the output of which clocks said converter, and an analysis circuit connected to control the multiplexer according to successive values of the register output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.