Method and apparatus for deglitching digital to analog converters
US6304199A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 5, 1999 |
| Grant date | Oct 16, 2001 |
| Priority date | — |
| Expiry date | May 5, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/785
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Asynchronous and synchronous deglitch controllers controlling switches of sample and hold circuits for deglitching digital to analog converters. Asynchronous and synchronous deglitch controllers detect transitions in the state of the digital input code to trigger or allow a one shot pulse to cause sample and hold circuits to go into hold mode for the period of the one shot pulse. Secondary glitch cancellation circuitry models the environment of the sample and hold circuit to emulate secondary glitch impulse generation. A differential amplifier substantially cancels secondary glitches related to the parasitic charges generated by the switching of the sample and hold circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.