A/D multi-channel pipeline architecture
US6304205A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2000 |
| Grant date | Oct 16, 2001 |
| Priority date | — |
| Expiry date | Jun 22, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/44
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for A/D conversion is provided. The apparatus provides for multi-path multi-channel (MPMC) pipelined A/D conversion. Unlike prior art designs in which the handling of multiple channels requires a linear increase in the associated circuitry and components, the current design scales for multiple channel A/D conversion with less than linear scalability. The A/D converter comprises a plurality of stages and interfaces between adjacent columns of the stages. The stages each include an input, a first output, and a second output. Each of the stages is responsive to an input signal applied to the input to output at the first output a bit signal corresponding to at least one significant bit of the input signal and to output at the second output a residue signal corresponding to a difference between the input signal and the bit signal. The stages are arranged in columns. The interfaces are located between adjacent columns for passing residue signals from an upstream one of the adjacent columns to the inputs of a downstream one of the adjacent columns. At least one interface includes a multiplexer. The multiplexer switchably couples residue signals from at east two of …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.