Patent · US Expired

Multibit sigma-delta converters employing dynamic element matching with reduced baseband tones

US6304608A · kind A · utility

67Cited by
5References
6Claims
0Family size

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Key dates

Filing dateNov 4, 1998
Grant dateOct 16, 2001
Priority date
Expiry dateNov 4, 2018

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03M3/464
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

A method for reducing baseband tones and intermodulation distortions in a multibit sigma-delta converter employing dynamic element matching is disclosed. An N-level sigma-delta analog-to-digital converter includes an analog loop filter, an N-level quantizer, an element selection logic, an internal N-level digital-to-analog converter (DAC), and a decimation filter, where N is an integer greater than two. Adding k extra unit elements to the internal N-level DAC, which totally comprises (N-1+k) unit elements, can shift the sigma-delta modulator tones and intermodulation distortions outside the baseband with no change to the quantization levels of the internal N-level DAC, where k is a positive integer. A cyclical selection of (N-1+k) unit elements in the internal N-level DAC is in accordance with an element selection logic which receives an output of the N-level quantizer and produces a set of control signals for the element selection of the internal N-level DAC. The present invention can also be applied to a multibit sigma-delta digital-to-analog converter.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.