Process of fabricating a semiconductor device
US6306694A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 10, 2000 |
| Grant date | Oct 23, 2001 |
| Priority date | — |
| Expiry date | Mar 10, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/0223
Abstract
A semiconductor device having high operating performance and reliability is disclosed, and its fabrication process is also disclosed. In an n-channel type TFT 302, an Lov region 207 is disposed, whereby a TFT structure highly resistant to hot carriers is realized. Further, in an n-channel type TFT 304 forming a pixel portion, Loff regions 217 to 220 are disposed, whereby a TFT structure having a low OFF-current value is realized. In this case, in the Lov region, the n-type impurity element exists at a concentration higher than that of the Loff regions, and the whole of the n-type impurity region (b) which constitutes the Lov region is sufficiently activated by optical annealing, so that a good junction portion is formed between the n-type impurity region and the channel forming region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.