Trim systems and methods having temporary and permanent operational modes
US6307491A · kind A · utility
0Cited by
6References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2000 |
| Grant date | Oct 23, 2001 |
| Priority date | — |
| Expiry date | Feb 24, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/785
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Latch systems and methods are configured to temporarily latch trim signals in experimental combinations of set and reset states and, subsequently, to permanently latch the trim signals in a preferred combination (i.e., a combination that optimizes the performance parameters of an electronic circuit). Latch systems of the invention include a latch, a reset driver, a temporary-set driver and a permanent-set driver and are particularly suited for determining a preferred combination of set and reset states prior to permanently latching this preferred combination.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.