ATM cell transmission system
US6307858A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 11, 1998 |
| Grant date | Oct 23, 2001 |
| Priority date | — |
| Expiry date | Dec 11, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5681
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
In an ATM cell transmission system having an ATM layer device (1), a data path interface (3) and a plurality of normal PHY (Physical) layer devices (2-0 to 2-M) according to Utopia Level 2 specification, the ATM layer device (1) comprises: a cell buffer (4); FIFO memories (5-0 to 5-M) each corresponding to each of the normal PHY layer devices (2-0 to 2-M); an output controller (5') for controlling the cell buffer (4) to output an ATM cell to be transmitted through one of the normal PHY layer devices (2-0 to 2-M) into corresponding one of the FIFO memories (5-0 to 5-M) on condition that the ATM cell is stored in the cell buffer (4) and the corresponding one of the FIFO memories (5-0 to 5-M) is not full; and a cell transmission controller (10) for performing polling of the normal PHY layer devices (2-0 to 2-M), designating a selected PHY layer device among the normal PHY layer devices (2-0 to 2-M) which have returned the HIGH level of the cell transmission allowance signal (TxClav) to the polling and whereof corresponding FIFO memories (5-0 to 5-M) are not empty, selecting one of the FIFO memories (5-0 to 5-M) corresponding to the selected PHY layer device as a next sender of cell da…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.