Process for forming high voltage junction termination extension oxide
US6309952A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 6, 1998 |
| Grant date | Oct 30, 2001 |
| Priority date | — |
| Expiry date | Oct 6, 2018 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/266
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for forming a junction termination extension (JTE) oxide having reduced total oxide charge and SiO.sub.2 --Si interface trap density parameters uses precursor densified thin oxide layers to improve the quality of subsequently formed thicker oxide layers, and multiple anneals to remove implant damage and set geometry parameters. After formation of a first dual oxide layer, and a post-oxidation anneal, the oxide is patterned and JTE regions are implanted. Implant-based near surface crystalline damage is annealed out in a non-oxidizing ambient, and JTE dopants are partially driven into adjoining material of the substrate. A thin dense bulk precursor oxide layer is grown on the exposed JTE dopant-implanted surface portions of the substrate, followed by forming the bulk of the JTE oxide in a steam or wet oxygen atmosphere. The substrate is then annealed in a non-oxidizing ambient, to cause a further drive-in of the JTE dopants. The associated reduction in Qox and Dit improves high voltage edge stability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.