LDO regulator with thermal shutdown system and method
US6310467A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 22, 2001 |
| Grant date | Oct 30, 2001 |
| Priority date | — |
| Expiry date | Mar 22, 2021 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/575
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A method and apparatus is directed to a thermal shut down for a low drop out (LDO) regulator including a MOS transistor. An error amplifier controls the gate of the MOS transistor by comparing the regulator output voltage to a reference voltage that is generated by a reference circuit. To enhance power supply rejection and improve regulation, the error amplifier and the reference circuits are powered by a potential at an internal power supply node. A power control circuit selectively couples the internal power supply node to one of the regulated output voltage and the unregulated supply voltage. A start-up circuit may be employed to ensure that regulation begins when power is applied. A temperature sensor circuit detects when the operating temperature exceeds a predetermined temperature and activates a supply transfer circuit to couple the unregulated supply to the internal power supply node. After the internal power supply node reaches the unregulated power supply potential, a shutdown circuit deactivates the MOS transistor. A diode is coupled between the regulator output and the internal power supply node to prevent current flowing from the internal power supply node to the load …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.