TFT substrate having connecting line connect to bus lines through different contact holes
US6310669A · kind A · utility
33Cited by
3References
13Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | May 21, 1998 |
| Grant date | Oct 30, 2001 |
| Priority date | — |
| Expiry date | May 21, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F1/136227
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A TFT array substrate including: an insulating substrate, a gate electrode, a gate electrode line, an insulating film, a semiconductor layer, a contact layer, a source electrode, a drain electrode, a source electrode line, an interlayer insulating film, a pixel electrode, and a connecting line which is made of a same material that of the pixel electrode and connects electrically between the gate electrode line and the source electrode line through a second contact hole provided in the insulating film and a third contact hole provided in the interlayer insulating film.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.