Systems and methods for on-chip storage of virtual connection descriptors
US6311212A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 1999 |
| Grant date | Oct 30, 2001 |
| Priority date | — |
| Expiry date | Mar 16, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/12
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Systems and methods for storing, or caching, VC descriptors on a single-chip network processor to enhance system performance. The single-chip network processor includes an on-chip cache memory that stores VC descriptors for fast retrieval. When a VC descriptor is to be retrieved, a processing engine sends a VC descriptor identifier to a content-addressable memory (CAM), which stores VC descriptor identifiers in association with addresses in the cache where associated VC descriptors are stored. If the desired VC descriptor is stored in the cache, the CAM returns the associated address to the processing engine and the processing engine retrieves the VC descriptor from the cache memory. If the VC descriptor is not stored in the cache, the CAM returns a miss signal to the processing engine, and the processing engine retrieves the VC descriptor from an off-chip memory. In this manner, VC descriptors associated with high bandwidth VCs are stored to the cache and retrieved much quicker from the cache than from the off-chip memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.