Patent · US Expired

Low source inductance compact FET topology for power amplifiers

US6313512A · kind A · utility

18Cited by
10References
25Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 25, 1999
Grant dateNov 6, 2001
Priority date—
Expiry dateFeb 25, 2019

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/14
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A field effect transistor (FET) comprising a plurality of drain finger electrodes, source finger electrodes and gate finger electrodes disposed in an active region of a semiconductor substrate; a drain bus disposed outside the active region and electrically connecting the drain finger electrodes to each other; a gate bus disposed outside the active region and electrically connecting the gate finger electrodes to each other; and a source bus disposed outside the active region and electrically connecting the source finger electrodes to each other; wherein the drain fingers are electrically connected to each other via the drain bus without crossing over the source or gate fingers.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.