Calibrated line driver with digital-to-analog converter
US6313776A · kind A · utility
17Cited by
3References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Nov 22, 1999 |
| Grant date | Nov 6, 2001 |
| Priority date | — |
| Expiry date | Nov 22, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0272
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
In a line driver that utilizes a digital-to-analog converter (DAC) to generate a current that is used to form an output voltage V.sub.OD, variations in the output voltage V.sub.OD are minimized by a calibration circuit that senses the output voltage V.sub.OD, compares the output voltage V.sub.OD to a reference voltage, and then increments or decrements the bias current fed into the DAC to match the output voltage V.sub.OD to the reference voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.