Method and apparatus for calibrating a synchronous read channel integrated circuit
US6313961A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 5, 1996 |
| Grant date | Nov 6, 2001 |
| Priority date | — |
| Expiry date | Jan 5, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B20/10055
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for calibrating the components of a Partial Response Read Channel (PRML) integrated circuit utilized in a magnetic storage device including a channel quality circuit, incorporated within the read channel IC, for automatically measuring the performance of each component as data is read by the channel. An error measurement for each component is generated as an indicator of the component's performance, such as a sample error generated by measuring the difference between the samples read by the channel and expected samples. The read channel components are programmed over a range of settings to determine the settings that generate the minimum error. By programming the components with settings corresponding to minimum error rates, the read channel is optimized. A programming device incorporated within the magnetic storage device and connected to the read channel IC executes a calibration program when the storage device is manufactured, repaired, and periodically to compensate for changes in the storage device and storage medium that occur over time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.